24/06/2024
Electrical / Electronics , IT - Hardware / Network , IT - Software
Permanent
Competitive
2 - 5 Years
Experienced (Non - Manager)
03/07/2024
Position: Memory Layout Engineer
Level: Senior Engineer
Our team is looking for an experienced Memory Layout Design Engineer who plays a critical role in layout design for various foundation IPs.
Responsibilities:
In the role of a Senior Layout design engineer, you will take the responsibility to:
Design, develop and modify layout design for Embedded Memory IPs, Standard Cells, IOs
Improve and Determine methods and procedures for Layout development flow
Key Qualifications
Bachelor’s or Master’s degree, Electronics Engineering, Telecommunication, Physics or related fields
Typically, minimum of 2 years of experience in Layout design
Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.
Strong communication, documentation and analytical skills.
About Synopsys:
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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