Senior Substrate Design Engineer

1.      Substrate Design

• Design complex package substrate layouts using Cadence Allegro APD.
• Develop substrate stack-up based on electrical and manufacturing requirements.
• Perform die fan-out, BGA fan-out, escape routing, and high-density routing.
• Design power distribution networks, reference planes, shielding structures, and return paths.
• Optimize routing for high-speed differential pairs and impedance-controlled signals.
• Create substrate documentation including fabrication drawings, Gerber, ODB++, IPC-2581, BOM, and manufacturing packages.

2.      Engineering Collaboration

• Work closely with SI/PI engineers to optimize impedance, insertion loss, return loss, crosstalk, power integrity.
• Coordinate with Mechanical Engineering on package outline, keep-out regions, stiffeners, connectors, and assembly constraints.
• Support DFM reviews with substrate vendors.
• Communicate technical issues directly with customers when clarification is required.

3.      Manufacturing Support

• Ensure layout complies with fabrication capabilities.
• Review vendor DFM reports and implement necessary changes.
• Support prototype build, engineering validation, and production release.

4.      Design Verification

• Review stack-up, routing quality, copper distribution, and return current continuity.
• Perform layout verification including DRC, Constraint Manager checks, connectivity verification, manufacturing checks.
• Support SI/PI simulation teams with required layout information.

5.      Continuous Improvement

• Improve design methodology and reusable libraries.
• Develop routing guidelines and best practices.
• Participate in process optimization and automation.

• Bachelor's degree in Electrical Engineering, Electronics Engineering, Mechatronics, or related field.
• 4+ years of experience in:
  • MLO substrate design
  • IC package substrate
  • High-density PCB
• Strong experience with:
  • Cadence Allegro APD
  • Allegro PCB Editor
• Good understanding of:
  • HDI technology
  • Microvia structures
  • Sequential lamination
• Familiar with:
  • impedance control
  • differential routing
  • return path optimization
  • EMI/EMC fundamentals
• Experience working with manufacturing vendors and DFM reviews.
• Occasional overtime may be required to support project milestones and customer schedules.
• May be required to communicate with global teams across different time zones.